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A FPGA-based digital down-conversion receiver that pulls in 130 million 16 bit samples per second! The FPGA implements multiple receivers providing I + Q for bandwidths of up to 96KHz for center frequencies from 0 - 60MHz. Further filtering and demodulation is then done on the PC host.
Open Source Hardware User Group, at Osmosoft Towers, St James Park, London oshug.org/event/5