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Spin-Torque MRAM | by jurvetson
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Spin-Torque MRAM

16 years in the making, Everspin just unveiled the first spin-torque MRAM, a contender for a new generation of memory chip technology.


Our original investment thesis for novel memory technologies (like Coatue/AMD, Nantero and Everspin) was a sense that Moore’s Law would begin to bifurcate, where technical advances in memory precede logic by several years. In the next few years, radical advances in memory density and performance will be needed to relieve the performance bottleneck in corporate computing.


These new technologies are non-volatile rad-hard memories that should be faster, smaller, cooler, cheaper and more reliable than the SRAM and DRAM kludge.


Background: Memory advances are becoming increasingly important to further advances in computing and computation. The mention of Moore’s Law conjures up images of speedy Intel microprocessors. Logic chips used to be mostly made of logic gates, but today’s microprocessors, network processors, FPGAs, DSPs and other “systems on a chip” are mostly memory. But they are still built in fabs that were optimized for logic, not memory.


The IC market can be broadly segmented into memory and logic chips. The ITRS estimates that 90% of all logic chip area is actually memory. Coupled with the standalone memory business, we are entering an era for complex chips where almost all transistors manufactured are memory, not logic.


Back in 2005 I was truck by the details of Intel’s Montecito processor. They had to add more error-correction-code memory bits (now over 2 bits per byte) to deal with the growing problem of soft errors (alpha particles from radioactive decay and cosmic rays from space flipping a bit as the transistors get very small). According to Intel, of the 1.72 billion transistors on the chip, 1.66 billion are memory and 0.06 billion are logic.


Why the trend to memory-saturated designs? Intel’s primary design enhancement from the prior Itanium processor was to “relieve the memory bottleneck.” For enterprise workloads, Itanium executes 15% of the time and stalls 85% of the time waiting for main memory. When the processor lacks the needed data in the on-chip cache, it has to take a long time penalty to access the off-chip DRAM. Power and cost are also improved to the extent that more can be integrated on chip.


Who should care about this? A large and growing set of industries depends on continued exponential cost declines in computational power and storage density. Moore’s Law drives electronics, communications and computers and has become a primary driver in drug discovery and bioinformatics, medical imaging and diagnostics. Over time, the lab sciences become information sciences, and then the speed of iterative simulations accelerates the pace of progress.


Intel is right: "Compute must evolve"



More on the big picture version of Moore's Law.



News on Spin-Torque MRAM: VentureBeat and Electronic Design.


P.S. we have a conference room at work dedicated to MRAM 1.0, aka core memory.

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Uploaded on November 14, 2012