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MT9V032 camera to FPGA interface development | by Dan Strother
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MT9V032 camera to FPGA interface development

The setup on my desk for testing and developing the firmware and Verilog for my FPGA-accelerated vision platform.

 

Pictured:

- my MT9V032 LVDS camera board

- my FMC-LPC to SATA adapter

- a Xilinx Spartan-6 FPGA SP605 board.

 

As of this photo, I've successfully developed the code that allows the Spartan-6 to deserialize the MT9V032's 300+ Mbps LVDS data stream - I use the FPGA's SerDes blocks to perform the deserialization, rather than relying on an external deserializer chip (as suggested in the image sensor's data sheet).

 

That little green LED on the FMC-LPC board (should you actually be able to see it) indicates that the FPGA has successfully locked to the MT9V032's output. Remarkably, it worked on the first try (no doubt thanks to simulating everything beforehand! - some simulation waveforms are just barely visible on my monitor in the upper right).

 

Next step: actually sending the video data somewhere to confirm that the sensor is really truly working (good thing the SP605 has a DVI output..).

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Taken on November 15, 2010