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A FPGA-based digital down-conversion receiver that pulls in 130 million 16 bit samples per second! The FPGA implements multiple receivers providing I + Q for bandwidths of up to 96KHz for center frequencies from 0 - 60MHz. Further filtering and demodulation is then done on the PC host.

The XK-XMP-64 is a prototype multi-processor board that demonstrates the scalability of the XS1 architecture. Based on the same board format as the XDK, the XMP-64 connects together 64 XCore processors in 16 XS1-G4 devices on a single PCB, delivering 25 GIPS:

16 x XS1-G4 four-core devices connected as a hypercube, some serious power there!


More info at:

16 x quad core XMOS devices connected in a 4-D hypercube - the extremely cool XMP-64 development kit.